IBM claims first sub-1nm chip: a 0.7nm "nanostack" node fitting ~100B transistors

IBM is claiming the first sub-1nm node: a 0.7nm / 7-angstrom process built on a 3D "nanostack" architecture that vertically stacks and staggers transistors to fit nearly 100 billion on a chip, which IBM says delivers 70% greater energy efficiency. As always with node-name marketing, the angstrom figure is a label rather than a literal feature size — so the density and efficiency claims matter more than the "sub-1nm" branding.

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